Description
PCI Express Digital I/O Cards with Counters and COS Detection
This product is an x1 lane PCIe DIO board available in four models ranging from basic DIO to advanced COS detection and Counter/Timer capabilities. The card emulates an 8255 compatible chip, providing 24 DIO lines. The DIO lines are grouped into three 8-bit ports: A, B, and C. Each 8-bit port is configured via software to function as either inputs or outputs. Port C can be further broken into two 4-bit nybbles via software and configured as either inputs or outputs.
Each DIO line is buffered and capable of up to 32mA source/sink. The VCCIO logic level is globally configured via jumper selection as 5V, 3.3V, 2.5V or 1.8V. Also, ports A, B, C low nybble, and C high nybble are individually software selected as pull-up or pull-down through 10kΩ resistor networks. The last configured pull-up/down state is stored in on-board non-volatile memory and automatically applied at the next power up. The board is shipped factory default as pulled-up.
The card is 6.6 inches in length and 4.2 inches seated height. I/O wiring connections for this board are via a male 37-pin D-sub connector. A ribbon cable can be used to connect this card to termination panels.
Digital ∫ Features
“S” Models include new Digital Integration Features on 8 bits of input and 8 bits of output.
- Inputs: Enhanced Change-of-State IRQs can be enabled on a bit-by-bit basis, with a selectable (rising/falling) edge. Separately enabled per-bit edges are counted with an optional overflow IRQ. Low-side and high-side pulse widths are measured with a resolution as fine as 8ns. These measurements automatically provide both frequency and duty cycle measurements for waveforms up to 65.5 MHz.
- Outputs: Individual rising-or-falling pulses can be generated, individually or simultaneously on up to 8 output bits, with durations controllable with 8ns resolution. Sequential pulses or continuous frequencies (with programmable duty-cycle) can also be output.
- EZUpdate: FPGA supports EZUpdate allowing new FPGA code to be written via software across the PCI Express bus, allowing field upgrade with new features.
For details regarding Digital Integration Features please refer to the Digital Integration Features Reference.
SOFTWARE
The card is supported for use in most operating systems and includes a free DOS, Linux, and Windows XP -> 10, both 32 & 64 bit compatible software package. This package contains sample programs and source code in Visual Basic, Delphi, and Visual C++ for Windows. Also provided is a graphical setup program in Windows. Linux support includes installation files and basic samples for programming from user level via an open source kernel driver. Third party support includes a Windows standard DLL interface usable from the most popular application programs. Embedded OS support includes Windows Xpe, WES7, vxWorks, etc.